1. Field of the Invention
The present invention relates to a semiconductor device, in particular, a semiconductor device having a through electrode, and a manufacturing method thereof.
2. Description of the Related Art
Recently, there is a trend of systematizing computer equipment and communication equipment. Along with this trend, semiconductor devices used in such systems have been sophisticated by increasing the scale and the degree of integration. For the purpose of reducing the size of such electronic equipment, a three-dimensional semiconductor device having laminated semiconductor chips has been developed in addition to the sophistication of the individual semiconductor devices. In such a three-dimensional semiconductor device, a plurality of semiconductor chips are stacked and connected by the wire bonding connection or flip chip connection. The stacking of the semiconductor chips makes it possible to reduce the size of the semiconductor devices further. Further, a three-dimensional semiconductor device has recently been proposed for still further reduction of the size of the semiconductor devices, in which semiconductor chips are electrically connected by the use of a through electrode extending through a semiconductor substrate.
The related semiconductor devices having a through electrode are disclosed in the following patent documents. Japanese Laid-Open Patent Publication No. 2006-19455 (Patent Document 1) discloses a multiple through electrode provided in a single hole extending through a semiconductor substrate. The multiple through electrode is comprised of a first through electrode having a cylindrical shape, a first insulating film covering the cylindrical surface of the first through electrode, a second through electrode covering the cylindrical surface of the first insulating film, and a second insulating film covering the cylindrical surface of the second through electrode. The first and second through electrodes and the first and second insulating films are formed to have a common axis. In this manner, two through electrodes, namely the first and second through electrodes can be formed in a single hole.
Japanese Laid-Open Patent Publication No. 2006-19431 (Patent Document 2) discloses a technique to form through electrodes in a small area at a high density. A silicon substrate is formed with a ring-shaped hole, and a plurality of slit-shaped holes, and these holes are filled with an insulating film and a conductor. A ring-shaped cylindrical through electrode formed on the outside is used as a first cylindrical through electrode. A plurality of stripe-shaped through electrodes are formed inside the ring-shaped first cylindrical through electrode. The stripe-shaped through electrodes are formed to extend through a silicon substrate substantially parallel to each other. The formation of the through electrodes into a stripe shape makes it possible to reduce the thickness of the conductor for filling the holes. Thus, production throughput is increased.
Japanese Laid-Open Patent Publication No. 2006-114686 (Patent Document 3) discloses a technique relating to a trench capacitor instead of a through electrode. A silicon substrate is formed with a trench, and the trench is filled with a collar insulating film and a semiconductor material containing an impurity. A connection layer is formed in a part defined by setting back the top of the collar insulating film, and a storage node electrode is formed. Although the above-mentioned Patent Documents 1 and 2 describe a fabrication method of a through electrode, they do not describe a method as a through process to manufacture a semiconductor device having a through electrode. Therefore, it is a crucial problem to establish a manufacturing method as a through process for a semiconductor device having a through electrode.